1. Field of the Invention
The present invention relates to a method of simulating hot carrier deterioration of an MOS transistor, and in particular to a simulation method having an improved accuracy.
2. Description of the Related Art
Hot carrier deterioration of MOS transistors can be evaluated, for example, based on a rate (.DELTA.I.sub.D /I.sub.D) of a variation .DELTA.I.sub.D of a drain current to an initial drain current I.sub.D or a variation .DELTA.V.sub.th of a threshold voltage with respect to an initial threshold voltage V.sub.th.
A method of simulating hot carriers deterioration of an N-MOS transistor is described in IEEE Trans. Electron Devices, Vol. 35, pp 1004-1011, July 1988 by Kuo et al.
Under a static hot carrier stress condition by a DC (direct current), the hot carrier deterioration rate .DELTA.I.sub.D /I.sub.D can be expressed by the following formula (1): EQU .DELTA.I.sub.D /I.sub.D =A.multidot.t.sup.n ( 1)
where A" represents a coefficient, t represents a hot carrier stress time, and n represents a constant which depends on conditions such as a manufacturing condition of a transistor and a stress condition.
Assuming that a stress time which elapses until the variation rate of drain current attains to (.DELTA.I.sub.D /I.sub.D) is a lifetime of the transistor, the following formula (2) is obtained from the formula (1). EQU (.DELTA.I.sub.D /I.sub.D).sub.f =A.multidot..tau..sub.N.sup.n( 2)
For example, the time t at the relationship of (.DELTA.I.sub.D /I.sub.D).sub.f =10% is defined as the lifetime .tau..sub.N.
According to the above reference (Kuo et al), the lifetime .tau..sub.N of the N-MOS transistor is expressed by the following experimental formula (3) using a substrate current model. EQU .tau..sub.N =W.multidot.B.multidot.I.sub.SUB.sup.-m .multidot.I.sub.D.sup.m -1 ( 3)
where W represents a width of a gate, B represents a coefficient depending on a manufacturing condition of the transistor, I.sub.SUB represents a substrate current, and m represents an index which is deemed to be correlated to impact ionization and generation of interface energy levels.
From the formulas (2) and (3), the above coefficient A can be expresses by the following formula (4): EQU A=(.DELTA.I.sub.D /I.sub.D).sub.f .multidot.(W.multidot.B.multidot.I.sub.SUB.sup.-m .multidot.I.sub.D.sup.m-1).sup.-n ( 4)
Therefore, the following formula (5) is obtained from the formulas (1) and (4). EQU .DELTA.I.sub.D /I.sub.D =(.DELTA.I.sub.D /I.sub.D).sub.f .multidot.(W.multidot.B).sup.-n .multidot.I.sub.SUB.sup.mn .multidot.I.sub.D.sup.(1-m)n .multidot.t.sup.n ( 5)
For simplicity reasons, a definition expressed by the following formula (6) is employed: EQU F.sub.N (t)=(W.multidot.B).sup.-n .multidot.I.sub.SUB.sup.mn .multidot.I.sub.D.sup.(1-m)n .multidot.t.sup.n ( 6)
whereby the formula (5) is rewritten into the following formula (7): EQU .DELTA.I.sub.D /I.sub.D =(.DELTA.I.sub.D /I.sub.D).sub.f .multidot.F.sub.N (t) (7)
Thus, F.sub.N (t) represents a quantity of the hot carrier stress applied until a time t.
FIG. 19 is a flow diagram showing steps in a method of simulating hot carrier deterioration of an N-MOS transistor using the formula (5). In this flow diagram, a step S1 includes sub-steps S1a-S1e for extracting unknown parameters in the formula (5) by a preliminary experiment.
In the sub-step S1a, which is executed for determining the substrate current I.sub.SUB in the formula (3), an experimental formula I.sub.SUB =g(V.sub.G, V.sub.D) is determined so that it fits to data related to a plurality of measured points in the preliminary experiment. In the above experimental formula, V.sub.G represents a gate voltage and V.sub.D represents a drain voltage. An example of determining the substrate current I.sub.SUB is described in IEEE Electron Device Lett, Vol. EDL-5, December 1984, pp 505-507 by Chan et al.
In the sub-step S1b, transistor parameters such as a degree of movement of carries before application of the DC stress as well as a flat band voltage are extracted, for example, using a BSIM (Berkeley Short-Channel IGFET Model) Method, which is specifically described by IEEE J. Solid-State Circuits, Vol. SC-22, pp 558-566, August 1987 by Sheu et al. In the subsequent sub-step S1c, the DC stress is applied to the transistor. In the sub-step S1d, the transistor parameters after application of the DC stress are extracted.
Extraction of the transistor parameters before and after application of the DC stress is required for coinciding characteristics of the transistor before application of the stress with characteristics of the transistor obtained by simulation, and is also required for estimating correlation between the actual hot carrier deterioration of the transistor after application of the stress and variation of the transistor parameters.
In the sub-step S1e, the coefficient B and index m are extracted based on comparison of the experimental formula (3) and data related to a plurality of measured points in the preliminary experiment.
In a step 2, the formula (5) is calculated using the parameters extracted in the step S1, whereby the hot carrier deterioration of the N-MOS transistor is simulated.
According to the simulation in the prior art described above, the index n in formula (5) is treated as a constant. The value of index n can be obtained by plotting the hot carrier deterioration, which is caused by application of the DC stress in the sub-step S1c in FIG. 19, based on the formula (1) in a manner shown in FIG. 20. In FIG. 20, the abscissa represents log(t) and the ordinate represents log(.DELTA.I.sub.D /I.sub.D). For example, the value of index n in the formula (1) can be obtained, for example, from a gradient of straight line connecting data indicated by "x" marks of at least two measured points in the preliminary experiment.
According to the simulation in the prior art, however, the index n which is once determined in the preliminary experiment will be treated as a constant. In the case where the index n actually changes depending the stress condition, therefore, an precise result cannot be obtained when simulating the hot carrier deterioration of the MOS transistor by application of the DC stress which is different from that in the sub-step S1c for extracting transistor parameters.
Also in the case where AC (alternate current) is applied and thereby the stress condition changes depending on the time, a sufficiently precise result cannot be obtained in the conventional simulation in which the index n is treated as a constant.